Description
16-week paid internship on our Physical Design team. Open to students in an MEng / MASc or final-year BEng program in ECE / EE with a VLSI focus.
You'll rotate between floorplanning, P&R, and static timing analysis blocks, pairing with a senior engineer each rotation. Final week you'd present a timing-closure improvement on a real block (anonymized).
Requirements
- Currently enrolled in an EE / CompE degree with coursework in VLSI CAD
- Familiarity with at least one of: Innovus, ICC2, Genus, PrimeTime
- Comfortable on Linux / Tcl
- Available full-time May–August 2026
Required skills
physical design
static timing analysis
linux
tcl
vlsi
Nice to have
innovus
icc2
primetime
floorplanning